196 lines
8.8 KiB
C
196 lines
8.8 KiB
C
#include "asm/cpu.h"
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#include "asm/clock.h"
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#include "generic/typedef.h"
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#include "asm/p33.h"
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#include "asm/power_interface.h"
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#include "init.h"
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#include "app_config.h"
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#ifdef CONFIG_SYS_VDD_CLOCK_ENABLE
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enum SYSTEM_CLOCK {
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SYSTEM_CLK_3M,
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SYSTEM_CLK_4M,
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SYSTEM_CLK_6M,
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SYSTEM_CLK_8M,
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SYSTEM_CLK_9M,
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SYSTEM_CLK_12M,
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SYSTEM_CLK_13M,
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SYSTEM_CLK_16M,
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SYSTEM_CLK_19M,
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SYSTEM_CLK_20M,
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SYSTEM_CLK_24M,
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SYSTEM_CLK_26M,
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SYSTEM_CLK_27M,
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SYSTEM_CLK_32M,
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SYSTEM_CLK_38M,
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SYSTEM_CLK_40M,
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SYSTEM_CLK_48M,
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SYSTEM_CLK_53M,
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SYSTEM_CLK_60M,
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SYSTEM_CLK_64M,
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SYSTEM_CLK_80M,
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SYSTEM_CLK_96M,
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SYSTEM_CLK_106M,
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SYSTEM_CLK_120M,
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SYSTEM_CLK_160M,
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SYSTEM_CLK_192M,
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SYSTEM_CLK_240M,
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SYSTEM_CLK_320M,
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#ifdef CONFIG_OVERCLOCKING_ENABLE //超频
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SYSTEM_CLK_396M,
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#endif
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};
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static const u8 sys_vdd_table[][SYS_VDD_NUM] ALIGNE(4) = {//务必4对齐
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//1.2V内核电压 VDC1.4V电压 IO电压
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{SYSVDD_VOL_SEL_120V, VDC14_VOL_SEL_140V, VDDIOM_VOL_30V},//3M
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{SYSVDD_VOL_SEL_120V, VDC14_VOL_SEL_140V, VDDIOM_VOL_30V},//4M
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{SYSVDD_VOL_SEL_120V, VDC14_VOL_SEL_140V, VDDIOM_VOL_30V},//6M
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{SYSVDD_VOL_SEL_120V, VDC14_VOL_SEL_140V, VDDIOM_VOL_30V},//8M
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{SYSVDD_VOL_SEL_120V, VDC14_VOL_SEL_140V, VDDIOM_VOL_30V},//9M
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{SYSVDD_VOL_SEL_120V, VDC14_VOL_SEL_140V, VDDIOM_VOL_30V},//12M
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{SYSVDD_VOL_SEL_120V, VDC14_VOL_SEL_140V, VDDIOM_VOL_30V},//13M
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{SYSVDD_VOL_SEL_120V, VDC14_VOL_SEL_140V, VDDIOM_VOL_30V},//16M
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{SYSVDD_VOL_SEL_120V, VDC14_VOL_SEL_140V, VDDIOM_VOL_30V},//19M
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{SYSVDD_VOL_SEL_120V, VDC14_VOL_SEL_140V, VDDIOM_VOL_30V},//20M
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{SYSVDD_VOL_SEL_120V, VDC14_VOL_SEL_140V, VDDIOM_VOL_30V},//24M
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{SYSVDD_VOL_SEL_120V, VDC14_VOL_SEL_140V, VDDIOM_VOL_30V},//26M
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{SYSVDD_VOL_SEL_120V, VDC14_VOL_SEL_140V, VDDIOM_VOL_30V},//27M
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{SYSVDD_VOL_SEL_120V, VDC14_VOL_SEL_140V, VDDIOM_VOL_30V},//32M
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{SYSVDD_VOL_SEL_120V, VDC14_VOL_SEL_140V, VDDIOM_VOL_30V},//38M
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{SYSVDD_VOL_SEL_120V, VDC14_VOL_SEL_140V, VDDIOM_VOL_30V},//40M
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{SYSVDD_VOL_SEL_120V, VDC14_VOL_SEL_140V, VDDIOM_VOL_30V},//48M
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{SYSVDD_VOL_SEL_120V, VDC14_VOL_SEL_140V, VDDIOM_VOL_30V},//53M
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{SYSVDD_VOL_SEL_120V, VDC14_VOL_SEL_140V, VDDIOM_VOL_30V},//60M
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{SYSVDD_VOL_SEL_120V, VDC14_VOL_SEL_140V, VDDIOM_VOL_30V},//64M
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{SYSVDD_VOL_SEL_120V, VDC14_VOL_SEL_140V, VDDIOM_VOL_30V},//80M
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{SYSVDD_VOL_SEL_120V, VDC14_VOL_SEL_140V, VDDIOM_VOL_30V},//96M
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{SYSVDD_VOL_SEL_120V, VDC14_VOL_SEL_140V, VDDIOM_VOL_30V},//106M
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{SYSVDD_VOL_SEL_120V, VDC14_VOL_SEL_140V, VDDIOM_VOL_30V},//120M
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{SYSVDD_VOL_SEL_126V, VDC14_VOL_SEL_145V, VDDIOM_VOL_32V},//160M
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{SYSVDD_VOL_SEL_126V, VDC14_VOL_SEL_145V, VDDIOM_VOL_32V},//192M
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{SYSVDD_VOL_SEL_126V, VDC14_VOL_SEL_145V, VDDIOM_VOL_32V},//240M
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{SYSVDD_VOL_SEL_126V, VDC14_VOL_SEL_145V, VDDIOM_VOL_32V},//320M
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#ifdef CONFIG_OVERCLOCKING_ENABLE //超频
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{SYSVDD_VOL_SEL_129V, VDC14_VOL_SEL_145V, VDDIOM_VOL_32V},//396M
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#endif
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};
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#define SDRAM_FREQ_CAN_NOT_CHANGE 0 //SDRAM时钟频率默认不能动态改变（经测试，改变可能有风险，SYS:320MHZ+SDRAM:192MHZ与SYS:320MHZ+SDRAM:120MHZ的功耗相差2mA）
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static const u32 sys_clock_table[][SYS_CLK_NUM] ALIGNE(4) = {//务必4对齐
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//时钟倍数关系: hsb_clk = sys_clk/n, sfc_clk = hsb_clk/n, lsb_clk = hsb_clk/n, p33_clk = lsb_clk/n
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// sys_clk hsb_clk:<=160M sfc_clk:<=80M lsb_clk:<=80M p33_clk:<=20M sdram_clk:默认不能动态改变
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{ 3 * MHZ_UNIT, 3 * MHZ_UNIT, 3 * MHZ_UNIT, 2 * MHZ_UNIT, 2 * MHZ_UNIT, SDRAM_FREQ_CAN_NOT_CHANGE},//3M
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{ 4 * MHZ_UNIT, 4 * MHZ_UNIT, 4 * MHZ_UNIT, 2 * MHZ_UNIT, 2 * MHZ_UNIT, SDRAM_FREQ_CAN_NOT_CHANGE},//4M
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{ 6 * MHZ_UNIT, 6 * MHZ_UNIT, 6 * MHZ_UNIT, 3 * MHZ_UNIT, 3 * MHZ_UNIT, SDRAM_FREQ_CAN_NOT_CHANGE},//6M
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{ 8 * MHZ_UNIT, 8 * MHZ_UNIT, 8 * MHZ_UNIT, 4 * MHZ_UNIT, 4 * MHZ_UNIT, SDRAM_FREQ_CAN_NOT_CHANGE},//8M
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{ 9 * MHZ_UNIT, 9 * MHZ_UNIT, 9 * MHZ_UNIT, 4 * MHZ_UNIT, 4 * MHZ_UNIT, SDRAM_FREQ_CAN_NOT_CHANGE},//9M
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{ 12 * MHZ_UNIT, 12 * MHZ_UNIT, 12 * MHZ_UNIT, 6 * MHZ_UNIT, 6 * MHZ_UNIT, SDRAM_FREQ_CAN_NOT_CHANGE},//12M
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{ 13 * MHZ_UNIT, 13 * MHZ_UNIT, 13 * MHZ_UNIT, 6 * MHZ_UNIT, 6 * MHZ_UNIT, SDRAM_FREQ_CAN_NOT_CHANGE},//13M
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{ 16 * MHZ_UNIT, 16 * MHZ_UNIT, 16 * MHZ_UNIT, 8 * MHZ_UNIT, 8 * MHZ_UNIT, SDRAM_FREQ_CAN_NOT_CHANGE},//16M
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{ 19 * MHZ_UNIT, 19 * MHZ_UNIT, 19 * MHZ_UNIT, 9 * MHZ_UNIT, 9 * MHZ_UNIT, SDRAM_FREQ_CAN_NOT_CHANGE},//19M
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{ 20 * MHZ_UNIT, 20 * MHZ_UNIT, 20 * MHZ_UNIT, 10 * MHZ_UNIT, 10 * MHZ_UNIT, SDRAM_FREQ_CAN_NOT_CHANGE},//20M
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{ 24 * MHZ_UNIT, 24 * MHZ_UNIT, 24 * MHZ_UNIT, 12 * MHZ_UNIT, 12 * MHZ_UNIT, SDRAM_FREQ_CAN_NOT_CHANGE},//24M
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{ 26 * MHZ_UNIT, 26 * MHZ_UNIT, 26 * MHZ_UNIT, 13 * MHZ_UNIT, 13 * MHZ_UNIT, SDRAM_FREQ_CAN_NOT_CHANGE},//26M
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{ 27 * MHZ_UNIT, 27 * MHZ_UNIT, 27 * MHZ_UNIT, 13 * MHZ_UNIT, 13 * MHZ_UNIT, SDRAM_FREQ_CAN_NOT_CHANGE},//27M
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{ 32 * MHZ_UNIT, 32 * MHZ_UNIT, 32 * MHZ_UNIT, 16 * MHZ_UNIT, 8 * MHZ_UNIT, SDRAM_FREQ_CAN_NOT_CHANGE},//32M
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{ 38 * MHZ_UNIT, 38 * MHZ_UNIT, 38 * MHZ_UNIT, 19 * MHZ_UNIT, 9 * MHZ_UNIT, SDRAM_FREQ_CAN_NOT_CHANGE},//38M
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{ 40 * MHZ_UNIT, 40 * MHZ_UNIT, 40 * MHZ_UNIT, 20 * MHZ_UNIT, 10 * MHZ_UNIT, SDRAM_FREQ_CAN_NOT_CHANGE},//40M
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{ 48 * MHZ_UNIT, 48 * MHZ_UNIT, 48 * MHZ_UNIT, 24 * MHZ_UNIT, 12 * MHZ_UNIT, SDRAM_FREQ_CAN_NOT_CHANGE},//48M
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{ 53 * MHZ_UNIT, 53 * MHZ_UNIT, 53 * MHZ_UNIT, 27 * MHZ_UNIT, 13 * MHZ_UNIT, SDRAM_FREQ_CAN_NOT_CHANGE},//53M
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{ 60 * MHZ_UNIT, 60 * MHZ_UNIT, 60 * MHZ_UNIT, 30 * MHZ_UNIT, 10 * MHZ_UNIT, SDRAM_FREQ_CAN_NOT_CHANGE},//60M
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{ 64 * MHZ_UNIT, 64 * MHZ_UNIT, 64 * MHZ_UNIT, 32 * MHZ_UNIT, 11 * MHZ_UNIT, SDRAM_FREQ_CAN_NOT_CHANGE},//64M
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{ 80 * MHZ_UNIT, 80 * MHZ_UNIT, 40 * MHZ_UNIT, 40 * MHZ_UNIT, 13 * MHZ_UNIT, SDRAM_FREQ_CAN_NOT_CHANGE},//80M
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{ 96 * MHZ_UNIT, 96 * MHZ_UNIT, 48 * MHZ_UNIT, 48 * MHZ_UNIT, 16 * MHZ_UNIT, SDRAM_FREQ_CAN_NOT_CHANGE},//96M
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{106 * MHZ_UNIT, 106 * MHZ_UNIT, 53 * MHZ_UNIT, 53 * MHZ_UNIT, 17 * MHZ_UNIT, SDRAM_FREQ_CAN_NOT_CHANGE},//106M
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{120 * MHZ_UNIT, 120 * MHZ_UNIT, 60 * MHZ_UNIT, 60 * MHZ_UNIT, 20 * MHZ_UNIT, SDRAM_FREQ_CAN_NOT_CHANGE},//120M
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{160 * MHZ_UNIT, 160 * MHZ_UNIT, 80 * MHZ_UNIT, 53 * MHZ_UNIT, 17 * MHZ_UNIT, SDRAM_FREQ_CAN_NOT_CHANGE},//160M
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{192 * MHZ_UNIT, 96 * MHZ_UNIT, 48 * MHZ_UNIT, 48 * MHZ_UNIT, 16 * MHZ_UNIT, SDRAM_FREQ_CAN_NOT_CHANGE},//192M
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{240 * MHZ_UNIT, 120 * MHZ_UNIT, 60 * MHZ_UNIT, 60 * MHZ_UNIT, 20 * MHZ_UNIT, SDRAM_FREQ_CAN_NOT_CHANGE},//240M
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{320 * MHZ_UNIT, 160 * MHZ_UNIT, 80 * MHZ_UNIT, 53 * MHZ_UNIT, 17 * MHZ_UNIT, SDRAM_FREQ_CAN_NOT_CHANGE},//320M
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#ifdef CONFIG_OVERCLOCKING_ENABLE //超频
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{396 * MHZ_UNIT, 198 * MHZ_UNIT, 98 * MHZ_UNIT, 98 * MHZ_UNIT, 19 * MHZ_UNIT, 240 * MHZ_UNIT},//396M
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#endif
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};
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#define SYSVDDCLK_MAX_NUM SYSTEM_CLK_320M
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/*
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*系统使用函数
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*/
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void *sys_vdd_table_get(void)
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{
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return (void *)sys_vdd_table;
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}
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/*
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*系统使用函数
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*/
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void *sys_clock_table_get(void)
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{
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return (void *)sys_clock_table;
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}
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//=========应用层用户测试函数,用户需根据实际场景进行电源和时钟,自行进行调节===========//
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//系统时钟切换时间参考如下:
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//24M->320M: 6.20ms
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//320M->24M: 4.05ms
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//24M->32M: 7.16ms
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//240M->320M: 3.21ms
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//原始时钟较慢，则切换时间就较长
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//====================================================================================//
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#if 0
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#define SYSVDDCLK_SDRAM_TEST 0 //时钟修改+sdram测试
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static void sysvddclock_test()
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{
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char index = 0;
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u32 cnt = 0;
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u8 step = 0;
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os_time_dly(500);
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while (1) {
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#if !SYSVDDCLK_SDRAM_TEST
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os_time_dly(300);
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system_vdd_clock_set(index);
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index = JL_RAND->R64L % SYSVDDCLK_MAX_NUM;
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#else
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//时钟修改+sdram测试
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if (cnt % 10 == 0) {
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system_vdd_clock_set(index);
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index = JL_RAND->R64L % SYSVDDCLK_MAX_NUM;
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}
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volatile u32 len = (JL_RAND->R64L % 2048) * 1024;
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if (len < 10) {
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continue;
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}
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volatile u8 *paddr = malloc(len);
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volatile u8 *tmp = paddr;
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volatile u32 crcw, crcr;
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if (paddr) {
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while ((u32)paddr < ((u32)tmp + len - 4)) {
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*paddr++ = JL_RAND->R64L;
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}
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__asm_csync();
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crcw = CRC32(tmp, len - 4);
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__asm_csync();
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flushinv_dcache(tmp, len);
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__asm_csync();
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crcr = CRC32(tmp, len - 4);
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__asm_csync();
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if (crcw != crcr) {
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printf("---> err in crcw = 0x%x , crcr = 0x%x \n", crcw, crcr);
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}
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free(tmp);
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putchar('#');
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}
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cnt++;
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#endif
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}
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}
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static void sys_vdd_clock_init(void)
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{
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os_task_create(sysvddclock_test, NULL, 22, 1000, 0, "sysvddclock_test");
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}
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late_initcall(sys_vdd_clock_init);
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#endif
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#endif
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