93 lines
2.7 KiB
C
93 lines
2.7 KiB
C
#ifndef __DEBUG_H__
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#define __DEBUG_H__
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#include "generic/typedef.h"
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//LSB
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#define DBG_BT 0x80
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#define DBG_FUSB 0x81
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#define DBG_FUSB1 0x82
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//
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#define DBG_WFSDD 0x83
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#define DBG_WFSDC 0x84
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//
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#define DBG_SPI0 0x85
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#define DBG_SPI1 0x86
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#define DBG_SPI2 0x87
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#define DBG_SPI3 0x88
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//
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#define DBG_UART0_WR 0x89
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#define DBG_UART1_WR 0x8a
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#define DBG_UART0_RD 0x8b
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#define DBG_UART1_RD 0x8c
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#define DBG_UART2_WR 0x8d
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#define DBG_UART2_RD 0x8e
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//
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#define DBG_SS_D 0x8f
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#define DBG_SS_I 0x90
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#define DBG_PLNK0 0x91
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#define DBG_PLNK1 0x92
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#define DBG_ALNK0 0x93
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#define DBG_ALNK1 0x94
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#define DBG_AUDIO 0x95
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#define DBG_PAP 0x96
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// #define DBG_EMI 0x97
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#define DBG_SD0D 0x98
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#define DBG_SD1D 0x99
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#define DBG_SD0C 0x9a
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#define DBG_SD1C 0x9b
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#define DBG_ISP 0x9c
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#define DBG_ANC 0x9d
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#define DBG_SHA 0x9e
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#define DBG_SBC 0x9f
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#define DBG_SRC 0xa0
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#define DBG_EQ 0xa1
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#define DBG_ISC0 0x00
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#define DBG_ISC1 0x40
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#define DBG_LSB 0x80
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#define DBG_JPG 0xc0
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#define DBG_CPU0 0x100
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#define DBG_CPU1 0x140
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#define DBG_SDR 0x180
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#define DBG_DCP 0x1c0
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#define DBG_EMI 0x200
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#define DBG_IMD 0x240
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int axi_ram_write_range_limit(u32 low_addr, u32 high_addr, u32 is_allow_write_out, int id0, int id1);
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int dev_write_range_limit(int limit_index, void *low_addr, void *high_addr, u32 is_allow_write_out, int dev_id);
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int cpu_write_range_limit(void *low_addr, u32 win_size);
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void cpu_write_range_unlimit(void *low_addr);
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void pc_rang_limit(void *low_addr0, void *high_addr0, void *low_addr1, void *high_addr1);
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void debug_init(void);
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void debug_clear(void);
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void debug_msg_clear(void);
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void cpu_effic_init(void);
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void cpu_effic_calc(void);
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int sdr_read_write_range_limit(u32 low_addr, u32 high_addr,
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int id0, int id1,
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u8 rd0_permit, u8 wr0_permit,
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u8 rd1_permit, u8 wr1_permit,
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u8 wr0_over_area_permit, u8 wr1_over_area_permit);
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int sdr_read_write_range_unlimit(void);
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extern u32 text_rodata_begin;
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extern u32 text_rodata_end;
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extern u32 ram_text_rodata_begin;
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extern u32 ram_text_rodata_end;
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#endif
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