821 lines
22 KiB
C
821 lines
22 KiB
C
#include "asm/iic.h"
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#include "asm/isp_dev.h"
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#include "gc0310.h"
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#include "gpio.h"
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#include "generic/jiffies.h"
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#include "device/iic.h"
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#include "device/device.h"
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#include "app_config.h"
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#ifdef CONFIG_VIDEO_ENABLE
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#if (CONFIG_VIDEO_IMAGE_W > 640)
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#define GC0310_DEVP_INPUT_W 640
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#define GC0310_DEVP_INPUT_H 480
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#else
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#define GC0310_DEVP_INPUT_W CONFIG_VIDEO_IMAGE_W
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#define GC0310_DEVP_INPUT_H CONFIG_VIDEO_IMAGE_H
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#endif
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#ifdef CONFIG_VIDEO1_ENABLE /*开启video1则使用video1分辨率*/
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#undef GC0310_DEVP_INPUT_W
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#undef GC0310_DEVP_INPUT_H
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#define GC0310_DEVP_INPUT_W CONFIG_VIDEO1_IMAGE_W
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#define GC0310_DEVP_INPUT_H CONFIG_VIDEO1_IMAGE_H
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#endif
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#define GC0310_DEVP_MAX_W 648
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#define GC0310_DEVP_MAX_H 488
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#define CONFIG_INPUT_FPS 12
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static void *iic = NULL;
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static u8 GC0310_reset_io[2] = {-1, -1};
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static u8 GC0310_power_io[2] = {-1, -1};
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#define GC0310_WRCMD 0x42
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#define GC0310_RDCMD 0x43
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#define GC0310_1WIRE_MODE 0
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#define DELAY_TIME 10
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static s32 GC0310_set_output_size(u16 *width, u16 *height, u8 *freq);
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static unsigned char wrGC0310Reg(unsigned char regID, unsigned char regDat)
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{
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u8 ret = 1;
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dev_ioctl(iic, IIC_IOCTL_START, 0);
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if (dev_ioctl(iic, IIC_IOCTL_TX_WITH_START_BIT, GC0310_WRCMD)) {
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ret = 0;
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printf("iic write err!!! line : %d \n", __LINE__);
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goto exit;
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}
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delay(DELAY_TIME);
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if (dev_ioctl(iic, IIC_IOCTL_TX, regID)) {
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ret = 0;
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printf("iic write err!!! line : %d \n", __LINE__);
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goto exit;
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}
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delay(DELAY_TIME);
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if (dev_ioctl(iic, IIC_IOCTL_TX_WITH_STOP_BIT, regDat)) {
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ret = 0;
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printf("iic write err!!! line : %d \n", __LINE__);
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goto exit;
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}
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delay(DELAY_TIME);
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exit:
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dev_ioctl(iic, IIC_IOCTL_STOP, 0);
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return ret;
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}
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static unsigned char rdGC0310Reg(unsigned char regID, unsigned char *regDat)
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{
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u8 ret = 1;
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dev_ioctl(iic, IIC_IOCTL_START, 0);
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if (dev_ioctl(iic, IIC_IOCTL_TX_WITH_START_BIT, GC0310_WRCMD)) {
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ret = 0;
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printf("iic write err!!! line : %d \n", __LINE__);
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goto exit;
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}
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delay(DELAY_TIME);
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if (dev_ioctl(iic, IIC_IOCTL_TX_WITH_STOP_BIT, regID)) {
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ret = 0;
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printf("iic write err!!! line : %d \n", __LINE__);
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goto exit;
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}
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delay(DELAY_TIME);
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if (dev_ioctl(iic, IIC_IOCTL_TX_WITH_START_BIT, GC0310_WRCMD + 1)) {
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ret = 0;
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printf("iic write err!!! line : %d \n", __LINE__);
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goto exit;
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}
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delay(DELAY_TIME);
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dev_ioctl(iic, IIC_IOCTL_RX_WITH_STOP_BIT, (u32)regDat);
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exit:
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dev_ioctl(iic, IIC_IOCTL_STOP, 0);
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return ret;
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}
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static void GC0310_config_SENSOR(u16 *width, u16 *height, u8 *format, u8 *frame_freq)
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{
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/////////////////////////////////////////////////
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///////////////// system reg /////////////////
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/////////////////////////////////////////////////
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wrGC0310Reg(0xfe, 0xf0);
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wrGC0310Reg(0xfe, 0xf0);
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wrGC0310Reg(0xfe, 0x00);
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wrGC0310Reg(0xfc, 0x16); //4e
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wrGC0310Reg(0xfc, 0x16); //4e // [0]apwd [6]regf_clk_gate
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wrGC0310Reg(0xf2, 0x07); //sync output
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wrGC0310Reg(0xf3, 0x83); //ff//1f//01 data output
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wrGC0310Reg(0xf5, 0x07); //sck_dely
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#if 1 //24M pclk
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wrGC0310Reg(0xf7, 0x88); //f8//fd 88
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wrGC0310Reg(0xf8, 0x00); // 00
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wrGC0310Reg(0xf9, 0x4f); //0f//01 4d
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wrGC0310Reg(0xfa, 0x32); //32
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#else //48M //pclk
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wrGC0310Reg(0xf7, 0x01); //f8//fd 88
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wrGC0310Reg(0xf8, 0x81); // 00
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wrGC0310Reg(0xf9, 0x4e); //0f//01 4d
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wrGC0310Reg(0xfa, 0x32); //32
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#endif
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wrGC0310Reg(0xfc, 0xce);
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wrGC0310Reg(0xfd, 0x00);
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/////////////////////////////////////
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///// CISCTL reg /////////////////
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/////////////////////////////////////
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wrGC0310Reg(0x00, 0x2f);
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wrGC0310Reg(0x01, 0x0f);
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wrGC0310Reg(0x02, 0x04);
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wrGC0310Reg(0x03, 0x02);
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wrGC0310Reg(0x04, 0x12);
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wrGC0310Reg(0x09, 0x00);
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wrGC0310Reg(0x0a, 0x00);
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wrGC0310Reg(0x0b, 0x00);
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wrGC0310Reg(0x0c, 0x04);
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wrGC0310Reg(0x0d, 0x01);
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wrGC0310Reg(0x0e, 0xe8);
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wrGC0310Reg(0x0f, 0x02);
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wrGC0310Reg(0x10, 0x88);
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wrGC0310Reg(0x16, 0x00);
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wrGC0310Reg(0x17, 0x14);
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wrGC0310Reg(0x18, 0x1a);
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wrGC0310Reg(0x19, 0x14);
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wrGC0310Reg(0x1b, 0x48);
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wrGC0310Reg(0x1c, 0x1c);
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wrGC0310Reg(0x1e, 0x6b);
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wrGC0310Reg(0x1f, 0x28);
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wrGC0310Reg(0x20, 0x8b); //0x89 travis20140801
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wrGC0310Reg(0x21, 0x49);
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wrGC0310Reg(0x22, 0xb0);
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wrGC0310Reg(0x23, 0x04);
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wrGC0310Reg(0x24, 0xf2);
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/* wrGC0310Reg(0x24, 0x55);//pclk IO驱动能力 */
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wrGC0310Reg(0x34, 0x20);
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/////////////////////////////////////
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//////// BLK ////////////////////
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/////////////////////////////////////
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wrGC0310Reg(0x26, 0x23);
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wrGC0310Reg(0x28, 0xff);
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wrGC0310Reg(0x29, 0x00);
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wrGC0310Reg(0x32, 0x00);
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wrGC0310Reg(0x33, 0x10);
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wrGC0310Reg(0x37, 0x20);
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wrGC0310Reg(0x38, 0x10);
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wrGC0310Reg(0x47, 0x80);
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wrGC0310Reg(0x4e, 0x66);
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wrGC0310Reg(0xa8, 0x02);
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wrGC0310Reg(0xa9, 0x80);
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/////////////////////////////////////
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////// ISP reg ///////////////////
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/////////////////////////////////////
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wrGC0310Reg(0x40, 0xff);
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wrGC0310Reg(0x41, 0x21);
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wrGC0310Reg(0x42, 0xcf);
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wrGC0310Reg(0x44, 0x02);
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wrGC0310Reg(0x45, 0xa8);
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wrGC0310Reg(0x46, 0x02); //sync
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wrGC0310Reg(0x4a, 0x11);
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wrGC0310Reg(0x4b, 0x01);
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wrGC0310Reg(0x4c, 0x20);
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wrGC0310Reg(0x4d, 0x05);
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wrGC0310Reg(0x4f, 0x01);
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wrGC0310Reg(0x50, 0x01);
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wrGC0310Reg(0x55, 0x01);
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wrGC0310Reg(0x56, 0xe0);
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wrGC0310Reg(0x57, 0x02);
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wrGC0310Reg(0x58, 0x80);
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/////////////////////////////////////
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/////// GAIN ////////////////////
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/////////////////////////////////////
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wrGC0310Reg(0x70, 0x70);
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wrGC0310Reg(0x5a, 0x84);
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wrGC0310Reg(0x5b, 0xc9);
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wrGC0310Reg(0x5c, 0xed);
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wrGC0310Reg(0x77, 0x74);
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wrGC0310Reg(0x78, 0x40);
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wrGC0310Reg(0x79, 0x5f);
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/////////////////////////////////////
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/////// DNDD /////////////////////
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/////////////////////////////////////
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wrGC0310Reg(0x82, 0x14);
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wrGC0310Reg(0x83, 0x0b);
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wrGC0310Reg(0x89, 0xf0);
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/////////////////////////////////////
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////// EEINTP ////////////////////
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/////////////////////////////////////
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wrGC0310Reg(0x8f, 0xaa);
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wrGC0310Reg(0x90, 0x8c);
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wrGC0310Reg(0x91, 0x90);
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wrGC0310Reg(0x92, 0x03);
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wrGC0310Reg(0x93, 0x03);
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wrGC0310Reg(0x94, 0x05);
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wrGC0310Reg(0x95, 0x65);
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wrGC0310Reg(0x96, 0xf0);
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/////////////////////////////////////
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///////// ASDE ////////////////////
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/////////////////////////////////////
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wrGC0310Reg(0xfe, 0x00);
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/* wrGC0310Reg(0x11,0x00); */
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wrGC0310Reg(0x9a, 0x20);
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wrGC0310Reg(0x9b, 0x80);
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wrGC0310Reg(0x9c, 0x40);
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wrGC0310Reg(0x9d, 0x80);
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wrGC0310Reg(0xa1, 0x30);
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wrGC0310Reg(0xa2, 0x32);
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wrGC0310Reg(0xa4, 0x30);
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wrGC0310Reg(0xa5, 0x30);
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wrGC0310Reg(0xaa, 0x10);
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wrGC0310Reg(0xac, 0x22);
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/////////////////////////////////////
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/////// GAMMA ///////////////////
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/////////////////////////////////////
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wrGC0310Reg(0xfe, 0x00); //default
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wrGC0310Reg(0xbf, 0x08);
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wrGC0310Reg(0xc0, 0x16);
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wrGC0310Reg(0xc1, 0x28);
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wrGC0310Reg(0xc2, 0x41);
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wrGC0310Reg(0xc3, 0x5a);
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wrGC0310Reg(0xc4, 0x6c);
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wrGC0310Reg(0xc5, 0x7a);
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wrGC0310Reg(0xc6, 0x96);
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wrGC0310Reg(0xc7, 0xac);
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wrGC0310Reg(0xc8, 0xbc);
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wrGC0310Reg(0xc9, 0xc9);
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wrGC0310Reg(0xca, 0xd3);
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wrGC0310Reg(0xcb, 0xdd);
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wrGC0310Reg(0xcc, 0xe5);
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wrGC0310Reg(0xcd, 0xf1);
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wrGC0310Reg(0xce, 0xfa);
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wrGC0310Reg(0xcf, 0xff);
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/*
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wrGC0310Reg(0xfe,0x00);//big gamma
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wrGC0310Reg(0xbf,0x08);
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wrGC0310Reg(0xc0,0x1d);
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wrGC0310Reg(0xc1,0x34);
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wrGC0310Reg(0xc2,0x4b);
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wrGC0310Reg(0xc3,0x60);
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wrGC0310Reg(0xc4,0x73);
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wrGC0310Reg(0xc5,0x85);
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wrGC0310Reg(0xc6,0x9f);
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wrGC0310Reg(0xc7,0xb5);
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wrGC0310Reg(0xc8,0xc7);
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wrGC0310Reg(0xc9,0xd5);
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wrGC0310Reg(0xca,0xe0);
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wrGC0310Reg(0xcb,0xe7);
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wrGC0310Reg(0xcc,0xec);
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wrGC0310Reg(0xcd,0xf4);
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wrGC0310Reg(0xce,0xfa);
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wrGC0310Reg(0xcf,0xff);
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*/
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/*
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wrGC0310Reg(0xfe,0x00);//small gamma
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wrGC0310Reg(0xbf,0x08);
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wrGC0310Reg(0xc0,0x18);
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wrGC0310Reg(0xc1,0x2c);
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wrGC0310Reg(0xc2,0x41);
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wrGC0310Reg(0xc3,0x59);
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wrGC0310Reg(0xc4,0x6e);
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wrGC0310Reg(0xc5,0x81);
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wrGC0310Reg(0xc6,0x9f);
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wrGC0310Reg(0xc7,0xb5);
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wrGC0310Reg(0xc8,0xc7);
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wrGC0310Reg(0xc9,0xd5);
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wrGC0310Reg(0xca,0xe0);
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wrGC0310Reg(0xcb,0xe7);
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wrGC0310Reg(0xcc,0xec);
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wrGC0310Reg(0xcd,0xf4);
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wrGC0310Reg(0xce,0xfa);
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wrGC0310Reg(0xcf,0xff);
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*/
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/////////////////////////////////////
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/////// YCP //////////////////////
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/////////////////////////////////////
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wrGC0310Reg(0xd0, 0x40);
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wrGC0310Reg(0xd1, 0x34);
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wrGC0310Reg(0xd2, 0x34);
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wrGC0310Reg(0xd3, 0x40);
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wrGC0310Reg(0xd6, 0xf2);
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wrGC0310Reg(0xd7, 0x1b);
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wrGC0310Reg(0xd8, 0x18);
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wrGC0310Reg(0xdd, 0x03);
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/////////////////////////////////////
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//////// AEC ////////////////////
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/////////////////////////////////////
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wrGC0310Reg(0xfe, 0x01);
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wrGC0310Reg(0x05, 0x30);
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wrGC0310Reg(0x06, 0x75);
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wrGC0310Reg(0x07, 0x40);
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wrGC0310Reg(0x08, 0xb0);
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wrGC0310Reg(0x0a, 0xc5);
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wrGC0310Reg(0x0b, 0x11);
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wrGC0310Reg(0x0c, 0x00);
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wrGC0310Reg(0x12, 0x52);
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wrGC0310Reg(0x13, 0x38);
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wrGC0310Reg(0x18, 0x95);
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wrGC0310Reg(0x19, 0x96);
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wrGC0310Reg(0x1f, 0x20);
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wrGC0310Reg(0x20, 0xc0);
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wrGC0310Reg(0x3e, 0x40);
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wrGC0310Reg(0x3f, 0x57);
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wrGC0310Reg(0x40, 0x7d);
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wrGC0310Reg(0x03, 0x60);
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wrGC0310Reg(0x44, 0x02);
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/////////////////////////////////////
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//////// AWB ////////////////////
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/////////////////////////////////////
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wrGC0310Reg(0xfe, 0x01);
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wrGC0310Reg(0x1c, 0x91);
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wrGC0310Reg(0x21, 0x15);
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wrGC0310Reg(0x50, 0x80);
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wrGC0310Reg(0x56, 0x04);
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wrGC0310Reg(0x59, 0x08);
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wrGC0310Reg(0x5b, 0x02);
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wrGC0310Reg(0x61, 0x8d);
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wrGC0310Reg(0x62, 0xa7);
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wrGC0310Reg(0x63, 0xd0);
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wrGC0310Reg(0x65, 0x06);
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wrGC0310Reg(0x66, 0x06);
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wrGC0310Reg(0x67, 0x84);
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wrGC0310Reg(0x69, 0x08);
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wrGC0310Reg(0x6a, 0x25);
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wrGC0310Reg(0x6b, 0x01);
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wrGC0310Reg(0x6c, 0x00);
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wrGC0310Reg(0x6d, 0x02);
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wrGC0310Reg(0x6e, 0xf0);
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wrGC0310Reg(0x6f, 0x80);
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wrGC0310Reg(0x76, 0x80);
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wrGC0310Reg(0x78, 0xaf);
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wrGC0310Reg(0x79, 0x75);
|
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wrGC0310Reg(0x7a, 0x40);
|
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wrGC0310Reg(0x7b, 0x50);
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wrGC0310Reg(0x7c, 0x0c);
|
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|
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wrGC0310Reg(0x90, 0xc9); //stable AWB
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wrGC0310Reg(0x91, 0xbe);
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wrGC0310Reg(0x92, 0xe2);
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wrGC0310Reg(0x93, 0xc9);
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wrGC0310Reg(0x95, 0x1b);
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wrGC0310Reg(0x96, 0xe2);
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wrGC0310Reg(0x97, 0x49);
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wrGC0310Reg(0x98, 0x1b);
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wrGC0310Reg(0x9a, 0x49);
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wrGC0310Reg(0x9b, 0x1b);
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wrGC0310Reg(0x9c, 0xc3);
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wrGC0310Reg(0x9d, 0x49);
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wrGC0310Reg(0x9f, 0xc7);
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wrGC0310Reg(0xa0, 0xc8);
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wrGC0310Reg(0xa1, 0x00);
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wrGC0310Reg(0xa2, 0x00);
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wrGC0310Reg(0x86, 0x00);
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wrGC0310Reg(0x87, 0x00);
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wrGC0310Reg(0x88, 0x00);
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wrGC0310Reg(0x89, 0x00);
|
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wrGC0310Reg(0xa4, 0xb9);
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wrGC0310Reg(0xa5, 0xa0);
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wrGC0310Reg(0xa6, 0xba);
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wrGC0310Reg(0xa7, 0x92);
|
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wrGC0310Reg(0xa9, 0xba);
|
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wrGC0310Reg(0xaa, 0x80);
|
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wrGC0310Reg(0xab, 0x9d);
|
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wrGC0310Reg(0xac, 0x7f);
|
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wrGC0310Reg(0xae, 0xbb);
|
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wrGC0310Reg(0xaf, 0x9d);
|
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wrGC0310Reg(0xb0, 0xc8);
|
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wrGC0310Reg(0xb1, 0x97);
|
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wrGC0310Reg(0xb3, 0xb7);
|
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wrGC0310Reg(0xb4, 0x7f);
|
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wrGC0310Reg(0xb5, 0x00);
|
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wrGC0310Reg(0xb6, 0x00);
|
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wrGC0310Reg(0x8b, 0x00);
|
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wrGC0310Reg(0x8c, 0x00);
|
||
wrGC0310Reg(0x8d, 0x00);
|
||
wrGC0310Reg(0x8e, 0x00);
|
||
wrGC0310Reg(0x94, 0x55);
|
||
wrGC0310Reg(0x99, 0xa6);
|
||
wrGC0310Reg(0x9e, 0xaa);
|
||
wrGC0310Reg(0xa3, 0x0a);
|
||
wrGC0310Reg(0x8a, 0x00);
|
||
wrGC0310Reg(0xa8, 0x55);
|
||
wrGC0310Reg(0xad, 0x55);
|
||
wrGC0310Reg(0xb2, 0x55);
|
||
wrGC0310Reg(0xb7, 0x05);
|
||
wrGC0310Reg(0x8f, 0x00);
|
||
wrGC0310Reg(0xb8, 0xcb);
|
||
wrGC0310Reg(0xb9, 0x9b);
|
||
/*
|
||
wrGC0310Reg(0xa4,0xb9); //default AWB
|
||
wrGC0310Reg(0xa5,0xa0);
|
||
wrGC0310Reg(0x90,0xc9);
|
||
wrGC0310Reg(0x91,0xbe);
|
||
wrGC0310Reg(0xa6,0xb8);
|
||
wrGC0310Reg(0xa7,0x95);
|
||
wrGC0310Reg(0x92,0xe6);
|
||
wrGC0310Reg(0x93,0xca);
|
||
wrGC0310Reg(0xa9,0xbc);
|
||
wrGC0310Reg(0xaa,0x95);
|
||
wrGC0310Reg(0x95,0x23);
|
||
wrGC0310Reg(0x96,0xe7);
|
||
wrGC0310Reg(0xab,0x9d);
|
||
wrGC0310Reg(0xac,0x80);
|
||
wrGC0310Reg(0x97,0x43);
|
||
wrGC0310Reg(0x98,0x24);
|
||
wrGC0310Reg(0xae,0xb7);
|
||
wrGC0310Reg(0xaf,0x9e);
|
||
wrGC0310Reg(0x9a,0x43);
|
||
wrGC0310Reg(0x9b,0x24);
|
||
wrGC0310Reg(0xb0,0xc8);
|
||
wrGC0310Reg(0xb1,0x97);
|
||
wrGC0310Reg(0x9c,0xc4);
|
||
wrGC0310Reg(0x9d,0x44);
|
||
wrGC0310Reg(0xb3,0xb7);
|
||
wrGC0310Reg(0xb4,0x7f);
|
||
wrGC0310Reg(0x9f,0xc7);
|
||
wrGC0310Reg(0xa0,0xc8);
|
||
wrGC0310Reg(0xb5,0x00);
|
||
wrGC0310Reg(0xb6,0x00);
|
||
wrGC0310Reg(0xa1,0x00);
|
||
wrGC0310Reg(0xa2,0x00);
|
||
wrGC0310Reg(0x86,0x60);
|
||
wrGC0310Reg(0x87,0x08);
|
||
wrGC0310Reg(0x88,0x00);
|
||
wrGC0310Reg(0x89,0x00);
|
||
wrGC0310Reg(0x8b,0xde);
|
||
wrGC0310Reg(0x8c,0x80);
|
||
wrGC0310Reg(0x8d,0x00);
|
||
wrGC0310Reg(0x8e,0x00);
|
||
wrGC0310Reg(0x94,0x55);
|
||
wrGC0310Reg(0x99,0xa6);
|
||
wrGC0310Reg(0x9e,0xaa);
|
||
wrGC0310Reg(0xa3,0x0a);
|
||
wrGC0310Reg(0x8a,0x0a);
|
||
wrGC0310Reg(0xa8,0x55);
|
||
wrGC0310Reg(0xad,0x55);
|
||
wrGC0310Reg(0xb2,0x55);
|
||
wrGC0310Reg(0xb7,0x05);
|
||
wrGC0310Reg(0x8f,0x05);
|
||
wrGC0310Reg(0xb8,0xcc);
|
||
wrGC0310Reg(0xb9,0x9a);
|
||
*/
|
||
|
||
/////////////////////////////////////
|
||
//////// CC ////////////////////////
|
||
/////////////////////////////////////
|
||
wrGC0310Reg(0xfe, 0x01);
|
||
|
||
wrGC0310Reg(0xd0, 0x38); //skin red
|
||
wrGC0310Reg(0xd1, 0x00);
|
||
wrGC0310Reg(0xd2, 0x02);
|
||
wrGC0310Reg(0xd3, 0x04);
|
||
wrGC0310Reg(0xd4, 0x38);
|
||
wrGC0310Reg(0xd5, 0x12);
|
||
/*
|
||
wrGC0310Reg(0xd0,0x38);//skin white
|
||
wrGC0310Reg(0xd1,0xfd);
|
||
wrGC0310Reg(0xd2,0x06);
|
||
wrGC0310Reg(0xd3,0xf0);
|
||
wrGC0310Reg(0xd4,0x40);
|
||
wrGC0310Reg(0xd5,0x08);
|
||
*/
|
||
/*
|
||
wrGC0310Reg(0xd0,0x38);//guodengxiang
|
||
wrGC0310Reg(0xd1,0xf8);
|
||
wrGC0310Reg(0xd2,0x06);
|
||
wrGC0310Reg(0xd3,0xfd);
|
||
wrGC0310Reg(0xd4,0x40);
|
||
wrGC0310Reg(0xd5,0x00);
|
||
*/
|
||
wrGC0310Reg(0xd6, 0x30);
|
||
wrGC0310Reg(0xd7, 0x00);
|
||
wrGC0310Reg(0xd8, 0x0a);
|
||
wrGC0310Reg(0xd9, 0x16);
|
||
wrGC0310Reg(0xda, 0x39);
|
||
wrGC0310Reg(0xdb, 0xf8);
|
||
/////////////////////////////////////
|
||
//////// LSC ////////////////////
|
||
/////////////////////////////////////
|
||
wrGC0310Reg(0xfe, 0x01);
|
||
wrGC0310Reg(0xc1, 0x3c);
|
||
wrGC0310Reg(0xc2, 0x50);
|
||
wrGC0310Reg(0xc3, 0x00);
|
||
wrGC0310Reg(0xc4, 0x40);
|
||
wrGC0310Reg(0xc5, 0x30);
|
||
wrGC0310Reg(0xc6, 0x30);
|
||
wrGC0310Reg(0xc7, 0x10);
|
||
wrGC0310Reg(0xc8, 0x00);
|
||
wrGC0310Reg(0xc9, 0x00);
|
||
wrGC0310Reg(0xdc, 0x20);
|
||
wrGC0310Reg(0xdd, 0x10);
|
||
wrGC0310Reg(0xdf, 0x00);
|
||
wrGC0310Reg(0xde, 0x00);
|
||
|
||
|
||
/////////////////////////////////////
|
||
/////// Histogram /////////////////
|
||
/////////////////////////////////////
|
||
wrGC0310Reg(0x01, 0x10);
|
||
wrGC0310Reg(0x0b, 0x31);
|
||
wrGC0310Reg(0x0e, 0x50);
|
||
wrGC0310Reg(0x0f, 0x0f);
|
||
wrGC0310Reg(0x10, 0x6e);
|
||
wrGC0310Reg(0x12, 0xa0);
|
||
wrGC0310Reg(0x15, 0x60);
|
||
wrGC0310Reg(0x16, 0x60);
|
||
wrGC0310Reg(0x17, 0xe0);
|
||
|
||
|
||
/////////////////////////////////////
|
||
// Measure Window ///////////////
|
||
/////////////////////////////////////
|
||
wrGC0310Reg(0xcc, 0x0c);
|
||
wrGC0310Reg(0xcd, 0x10);
|
||
wrGC0310Reg(0xce, 0xa0);
|
||
wrGC0310Reg(0xcf, 0xe6);
|
||
|
||
|
||
/////////////////////////////////////
|
||
///// dark sun //////////////////
|
||
/////////////////////////////////////
|
||
wrGC0310Reg(0x45, 0xf7);
|
||
wrGC0310Reg(0x46, 0xff);
|
||
wrGC0310Reg(0x47, 0x15);
|
||
wrGC0310Reg(0x48, 0x03);
|
||
wrGC0310Reg(0x4f, 0x60);
|
||
|
||
/////////////////////////////////////
|
||
/////// banding ///////////////////
|
||
/////////////////////////////////////
|
||
wrGC0310Reg(0xfe, 0x00);
|
||
wrGC0310Reg(0x05, 0x02);
|
||
/* wrGC0310Reg(0x06,0x25); //HB //出现切线调大这个增加行间隔 */
|
||
wrGC0310Reg(0x06, 0x55); //HB //出现切线调大这个增加行间隔
|
||
wrGC0310Reg(0x07, 0x00);
|
||
wrGC0310Reg(0x08, 0x1c); //VB
|
||
/* wrGC0310Reg(0x06,0x12); //HB */
|
||
/* wrGC0310Reg(0x07,0x00); */
|
||
/* wrGC0310Reg(0x08,0x1c); //VB */
|
||
|
||
|
||
wrGC0310Reg(0xfe, 0x01);
|
||
wrGC0310Reg(0x25, 0x00); //step
|
||
wrGC0310Reg(0x26, 0x1f);
|
||
wrGC0310Reg(0x27, 0x01); //6fps
|
||
wrGC0310Reg(0x28, 0xf0);
|
||
wrGC0310Reg(0x29, 0x01); //6fps
|
||
wrGC0310Reg(0x2a, 0xf0);
|
||
wrGC0310Reg(0x2b, 0x01); //6fps
|
||
wrGC0310Reg(0x2c, 0xf0);
|
||
wrGC0310Reg(0x2d, 0x03); //3.3fps
|
||
wrGC0310Reg(0x2e, 0xe0);
|
||
wrGC0310Reg(0x3c, 0x20);
|
||
///////// SPI ////////////////////
|
||
/////////////////////////////////////
|
||
wrGC0310Reg(0xfe, 0x03);
|
||
|
||
wrGC0310Reg(0x02, 0xff);
|
||
wrGC0310Reg(0x03, 0xff);
|
||
|
||
wrGC0310Reg(0x51, 0x01);
|
||
wrGC0310Reg(0x52, 0xd8);
|
||
wrGC0310Reg(0x53, 0x25); //[7]crc [3:2]line_num
|
||
wrGC0310Reg(0x54, 0x20);
|
||
wrGC0310Reg(0x55, 0x00); //20
|
||
wrGC0310Reg(0x59, 0x10);
|
||
wrGC0310Reg(0x5a, 0x00);
|
||
wrGC0310Reg(0x5b, 0x80);
|
||
wrGC0310Reg(0x5c, 0x02);
|
||
wrGC0310Reg(0x5d, 0xe0);
|
||
wrGC0310Reg(0x5e, 0x01);
|
||
wrGC0310Reg(0x60, 0xab);
|
||
wrGC0310Reg(0x61, 0x80);
|
||
wrGC0310Reg(0x62, 0x9d);
|
||
wrGC0310Reg(0x63, 0xb6);
|
||
wrGC0310Reg(0x64, 0x01); //[1]sck always 06 04
|
||
wrGC0310Reg(0x65, 0xff); //head sync code
|
||
wrGC0310Reg(0x66, 0x00);
|
||
wrGC0310Reg(0x67, 0x00);
|
||
}
|
||
static s32 GC0310_set_output_size(u16 *width, u16 *height, u8 *freq)
|
||
{
|
||
u16 liv_width = *width;
|
||
u16 liv_height = *height;
|
||
return 0;
|
||
}
|
||
|
||
static s32 GC0310_power_ctl(u8 isp_dev, u8 is_work)
|
||
{
|
||
return 0;
|
||
}
|
||
|
||
static s32 GC0310_ID_check(void)
|
||
{
|
||
u8 pid = 0x00;
|
||
u16 id = 0;
|
||
|
||
rdGC0310Reg(0xf0, &pid);
|
||
id |= (pid << 8) & 0xff00;
|
||
rdGC0310Reg(0xf1, &pid);
|
||
id |= pid;
|
||
printf("GC0310 Sensor ID : 0x%x\n", id);
|
||
|
||
if (id != 0xa310) {
|
||
return -1;
|
||
}
|
||
|
||
return 0;
|
||
}
|
||
|
||
void GC0310_powerio_ctl(u32 _power_gpio, u32 on_off)
|
||
{
|
||
gpio_direction_output(_power_gpio, on_off);
|
||
}
|
||
static void GC0310_reset(u8 isp_dev)
|
||
{
|
||
u8 res_io;
|
||
u8 powd_io;
|
||
u8 id = 0;
|
||
puts("GC0310 reset\n");
|
||
|
||
if (isp_dev == ISP_DEV_0) {
|
||
res_io = GC0310_reset_io[0];
|
||
powd_io = GC0310_power_io[0];
|
||
} else {
|
||
res_io = GC0310_reset_io[1];
|
||
powd_io = GC0310_power_io[1];
|
||
}
|
||
|
||
if (powd_io != (u8) - 1) {
|
||
GC0310_powerio_ctl(powd_io, 0);
|
||
}
|
||
|
||
if (res_io != (u8) - 1) {
|
||
gpio_direction_output(res_io, 1);
|
||
gpio_direction_output(res_io, 0);
|
||
os_time_dly(1);
|
||
gpio_direction_output(res_io, 1);
|
||
}
|
||
}
|
||
|
||
s32 GC0310_check(u8 isp_dev, u32 _reset_gpio, u32 _power_gpio)
|
||
{
|
||
if (!iic) {
|
||
if (isp_dev == ISP_DEV_0) {
|
||
iic = dev_open("iic0", 0);
|
||
} else {
|
||
iic = dev_open("iic1", 0);
|
||
}
|
||
|
||
GC0310_reset_io[isp_dev] = (u8)_reset_gpio;
|
||
GC0310_power_io[isp_dev] = (u8)_power_gpio;
|
||
}
|
||
|
||
if (iic == NULL) {
|
||
printf("GC0310 iic open err!!!\n\n");
|
||
return -1;
|
||
}
|
||
|
||
GC0310_reset(isp_dev);
|
||
|
||
if (0 != GC0310_ID_check()) {
|
||
printf("-------not GC0310------\n\n");
|
||
dev_close(iic);
|
||
iic = NULL;
|
||
return -1;
|
||
}
|
||
|
||
printf("-------hello GC0310------\n\n");
|
||
return 0;
|
||
}
|
||
|
||
|
||
s32 GC0310_init(u8 isp_dev, u16 *width, u16 *height, u8 *format, u8 *frame_freq)
|
||
{
|
||
puts("\n\n GC0310_init \n\n");
|
||
|
||
if (0 != GC0310_check(isp_dev, 0, 0)) {
|
||
return -1;
|
||
}
|
||
|
||
GC0310_config_SENSOR(width, height, format, frame_freq);
|
||
|
||
return 0;
|
||
}
|
||
void set_rev_sensor_GC0310(u16 rev_flag)
|
||
{
|
||
if (!rev_flag) {
|
||
wrGC0310Reg(0x17, 0x17);
|
||
} else {
|
||
wrGC0310Reg(0x17, 0x14);
|
||
}
|
||
}
|
||
|
||
//注意这个地方是假休眠函数 主要用于开源板两个摄像头io互斥操作
|
||
void GC0310_in_sleep_mode(void)
|
||
{
|
||
wrGC0310Reg(0xfe, 0x00);
|
||
wrGC0310Reg(0xf3, 0x00);
|
||
}
|
||
|
||
void GC0310_out_sleep_mode(u16 addr)
|
||
{
|
||
wrGC0310Reg(0xfe, 0x00);
|
||
wrGC0310Reg(0xf3, 0x83);
|
||
}
|
||
|
||
u16 GC0310_dvp_rd_reg(u16 addr)
|
||
{
|
||
u8 val;
|
||
rdGC0310Reg((u8)addr, &val);
|
||
return val;
|
||
}
|
||
|
||
void GC0310_dvp_wr_reg(u16 addr, u16 val)
|
||
{
|
||
wrGC0310Reg((u8)addr, (u8)val);
|
||
}
|
||
|
||
// *INDENT-OFF*
|
||
#ifdef CONFIG_SPI_USE_GET_YUV_C_ENABLE
|
||
REGISTER_CAMERA(GC0310) = {
|
||
#else
|
||
|
||
REGISTER_CAMERA1(GC0310) = { //注意这里是SPI摄像头
|
||
#endif
|
||
|
||
.logo = "GC0310",
|
||
.isp_dev = ISP_DEV_NONE,
|
||
.in_format = SEN_IN_FORMAT_YUYV,
|
||
.mbus_type = SEN_MBUS_BT656,
|
||
#if GC0310_1WIRE_MODE
|
||
.mbus_config = SEN_MBUS_DATA_WIDTH_1B | SEN_MBUS_PCLK_SAMPLE_FALLING,
|
||
#else
|
||
.mbus_config = SEN_MBUS_DATA_WIDTH_2B | SEN_MBUS_PCLK_SAMPLE_FALLING,
|
||
#endif
|
||
#if CONFIG_CAMERA_H_V_EXCHANGE
|
||
.sync_config = SEN_MBUS_SYNC0_VSYNC_SYNC1_HSYNC,//WL82/AC791才可以H-V SYNC互换，请留意
|
||
#endif
|
||
.fps = CONFIG_INPUT_FPS,
|
||
.out_fps = CONFIG_INPUT_FPS,
|
||
.sen_size = {GC0310_DEVP_INPUT_W, GC0310_DEVP_INPUT_H},
|
||
.cap_fps = CONFIG_INPUT_FPS,
|
||
.sen_cap_size = {GC0310_DEVP_INPUT_W, GC0310_DEVP_INPUT_H},
|
||
|
||
.ops = {
|
||
.avin_fps = NULL,
|
||
.avin_valid_signal = NULL,
|
||
.avin_mode_det = NULL,
|
||
.sensor_check = GC0310_check,
|
||
.init = GC0310_init,
|
||
.set_size_fps = GC0310_set_output_size,
|
||
.power_ctrl = GC0310_power_ctl,
|
||
|
||
|
||
.sleep = NULL,
|
||
.wakeup = NULL,
|
||
.write_reg = GC0310_dvp_wr_reg,
|
||
.read_reg = GC0310_dvp_rd_reg,
|
||
.set_sensor_reverse = set_rev_sensor_GC0310,
|
||
}
|
||
};
|
||
|
||
#endif
|
||
|